[PATCH 1/4 v5] PCI: add DT bindings for Faraday Technology PCI Host Bridge

On Sun, Mar 12, 2017 at 11:23 PM, Linus Walleij
[off-list ref] wrote:

This adds device tree bindings for the Faraday technology PCI
Host Bridge. This IP is found in the Storlink/Storm/Cortina
Gemini SoC platform.

Cc: Janos Laube <redacted>
Cc: Paulius Zaleckas <redacted>
Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: devicetree at vger.kernel.org
Cc: Feng-Hsin Chiang <redacted>
Cc: Greentime Hu <redacted>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <redacted>
---
ChangeLog v4->v5:
- No changes, just resend as everything else is rebased onto
  v4.11-rc1.

Bjorn do you have any further comments or can we queue patch
1+2 of this series?

I want to submit the DTS patches to the ARM SoC tree, so I need
to be sure the bindings+driver are merge material first.

Yours,
Linus Walleij