On 02/28, Heiko Stuebner wrote:

Recent changes to the 8250-dw variant revealed issues concerning
how the clock rates are handled on the rk3036 uart.

For one, there was an error in the clock declaration, but also the
shared uart-pll-select-mux also as default got supplied from the apll
that also supplies the cpu and thus gets frequency scaled.

The patches in this series remedy this and make the debug uart
function again on 4.10 + current merge window.

What's the merge path? The last patch is sort of questionable
because it fixes a regression by changing assigned clocks in DT,
which doesn't really make sense from a DT perspective (it should
have been right already or can be configured from the clk driver
itself in software).

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