[PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk
From: Y.T. Tang <hidden>
Date: 2017-02-27 02:57:03
Also in:
linux-clk, linux-devicetree, lkml
PING! Regards, Yuantian
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-----Original Message----- From: yuantian.tang at nxp.com [mailto:yuantian.tang at nxp.com] Sent: Wednesday, February 15, 2017 1:48 PM To: mturquette at baylibre.com Cc: sboyd at codeaurora.org; robh+dt at kernel.org; mark.rutland at arm.com; linux-clk at vger.kernel.org; devicetree at vger.kernel.org; linux- kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Y.T. Tang [off-list ref]; Scott Wood [off-list ref]; Y.T. Tang [off-list ref] Subject: [PATCH 1/2] dt-bindings: qoriq-clock: Add coreclk From: Tang Yuantian <redacted> ls1012a has separate input root clocks for core PLLs versus the platform PLL, with the latter described as sysclk in the hw docs. Update the qoriq-clock binding to allow a second input clock, named "coreclk". If present, this clock will be used for the core PLLs. Signed-off-by: Scott Wood <oss@buserror.net> Signed-off-by: Tang Yuantian <redacted> --- Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++ 1 file changed, 6 insertions(+)diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txtb/Documentation/devicetree/bindings/clock/qoriq-clock.txt index df9cb5a..97a9666 100644--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt@@ -55,6 +55,11 @@ Optional properties: - clocks: If clock-frequency is not specified, sysclk may be provided as an input clock. Either clock-frequency or clocks must be provided. + A second input clock, called "coreclk", may be provided if + core PLLs are based on a different input clock from the + platform PLL. +- clock-names: Required if a coreclk is present. Valid names are + "sysclk" and "coreclk". 2. Clock Provider@@ -71,6 +76,7 @@ second cell is the clock index for the specified type. 2 hwaccel index (n in CLKCGnHWACSR) 3 fman 0 for fm1, 1 for fm2 4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4 + 5 coreclk must be 0 3. Example --2.1.0.27.g96db324