NVMe vs DMA addressing limitations
From: Arnd Bergmann <hidden>
Date: 2017-01-10 10:55:25
Also in:
linux-nvme, linux-pci, linux-renesas-soc, lkml
From: Arnd Bergmann <hidden>
Date: 2017-01-10 10:55:25
Also in:
linux-nvme, linux-pci, linux-renesas-soc, lkml
On Tuesday, January 10, 2017 8:07:20 AM CET Christoph Hellwig wrote:
On Tue, Jan 10, 2017 at 09:47:21AM +0300, Nikita Yushchenko wrote:quoted
I'm now working with HW that: - is now way "low end" or "obsolete", it has 4G of RAM and 8 CPU cores, and is being manufactured and developed, - has 75% of it's RAM located beyond first 4G of address space, - can't physically handle incoming PCIe transactions addressed to memory beyond 4G.It might not be low end or obselete, but it's absolutely braindead. Your I/O performance will suffer badly for the life of the platform because someone tries to save 2 cents, and there is not much we can do about it.
Unfortunately it is a common problem for arm64 chips that were designed by taking a 32-bit SoC and replacing the CPU core. The swiotlb is the right workaround for this, and I think we all agree that we should just make it work correctly. Arnd