On Thu, Dec 15, 2016 at 04:54:30PM -0800, Doug Anderson wrote:

quoted

Index: b/arch/arm/boot/dts/exynos5800.dtsi
===================================================================

--- a/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.365955950 +0100
+++ b/arch/arm/boot/dts/exynos5800.dtsi 2016-12-15 12:43:54.361955949 +0100

@@ -24,6 +24,16 @@
 };

 &cluster_a15_opp_table {
+       opp at 2000000000 {
+               opp-hz = /bits/ 64 <2000000000>;
+               opp-microvolt = <1250000>;
+               clock-latency-ns = <140000>;
+       };
+       opp at 1900000000 {
+               opp-hz = /bits/ 64 <1900000000>;
+               opp-microvolt = <1250000>;
+               clock-latency-ns = <140000>;
+       };

I don't think the voltages you listed are high enough for all peach pi
boards for A15 at 1.9 GHz and 2.0 GHz, at least based on the research
I did.  See my response to v1.

I wanted to apply this but saw this remaining issue. Javier tested it
on Peach Pi so is this concern still valid?

Bartlomiej,
When sending dts patches please stick to the common subsystem prefix
(git log --oneline arch/arm/boot/dts/exynos*).

Best regards,
Krzysztof