Thread (10 messages) 10 messages, 5 authors, 2016-12-19

[PATCH] arm64: Work around Falkor erratum 1009

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From: mark.rutland@arm.com (Mark Rutland)
Date: 2016-12-08 11:46:02
Also in: kvm, kvmarm, lkml

On Wed, Dec 07, 2016 at 03:04:31PM -0500, Christopher Covington wrote:
From: Shanker Donthineni <redacted>

During a TLB invalidate sequence targeting the inner shareable
domain, Falkor may prematurely complete the DSB before all loads
and stores using the old translation are observed; instruction
fetches are not subject to the conditions of this erratum.

Signed-off-by: Shanker Donthineni <redacted>
Signed-off-by: Christopher Covington <redacted>
---
 arch/arm64/Kconfig                | 10 +++++++++
 arch/arm64/include/asm/cpucaps.h  |  3 ++-
 arch/arm64/include/asm/tlbflush.h | 43 +++++++++++++++++++++++++++++++++++++++
 arch/arm64/kernel/cpu_errata.c    |  7 +++++++
 arch/arm64/kvm/hyp/tlb.c          | 39 ++++++++++++++++++++++++++++++-----
 5 files changed, 96 insertions(+), 6 deletions(-)
Please update Documentation/arm64/silicon-errata.txt respectively.

[...]
quoted hunk ↗ jump to hunk
 #include <linux/sched.h>
 #include <asm/cputype.h>
+#include <asm/alternative.h>
Nit: please keep includes (alphabetically) ordered (at least below the
linux/ or asm/ level).

[...]
quoted hunk ↗ jump to hunk
+	asm volatile(ALTERNATIVE(
+		     "nop \n"
+		     "nop \n",
+		     "tlbi vmalle1is \n"
+		     "dsb ish \n",
As a general note, perhaps we want a C compatible NOP_ALTERNATIVE() so
that the nop case can be implicitly generated for sequences like this.

Thanks,
Mark.
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