Thread (1 message) 1 message, 1 author, 2016-10-17

[PATCH 1/3] ARM: memory: da8xx-ddrctl: new driver

From: khilman@baylibre.com (Kevin Hilman)
Date: 2016-10-17 16:55:15
Also in: dri-devel, linux-devicetree, lkml

Bartosz Golaszewski [off-list ref] writes:
Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.

Signed-off-by: Bartosz Golaszewski <redacted>
[...]
quoted hunk
diff --git a/drivers/memory/da8xx-ddrctl.c b/drivers/memory/da8xx-ddrctl.c
new file mode 100644
index 0000000..dcd0a61
--- /dev/null
+++ b/drivers/memory/da8xx-ddrctl.c
@@ -0,0 +1,77 @@
+/*
+ * TI da8xx DDR2/mDDR controller driver
+ *
+ * Copyright (C) 2016 BayLibre SAS
+ *
+ * Author:
+ *   Bartosz Golaszewski <bgolaszewski@baylibre.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#define DA8XX_DDR_CTL_BASE	0xB0000000
This base addr should be the reg property of the node.
+#define DA8XX_PBBPR_OFFSET	0x00000020
+#define DA8XX_PBBPR_REG(p)	((p) + DA8XX_PBBPR_OFFSET)
Kevin
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