[PATCH 2/2] devicetree: bindings: uart: Add new compatible string for ZynqMP
From: Nava kishore Manne <hidden>
Date: 2016-09-09 11:25:16
Also in:
linux-devicetree, linux-serial, lkml
Subsystem:
open firmware and flattened device tree bindings, the rest, tty layer and serial drivers · Maintainers:
Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds, Greg Kroah-Hartman, Jiri Slaby
From: Nava kishore Manne <redacted> Signed-off-by: Nava kishore Manne <redacted> Signed-off-by: Michal Simek <redacted> [stelford at cadence.com: cherry picked from https://github.com/Xilinx/linux-xlnx commit 37b8a9780766422b2437f5166ddef3767bb60887] Signed-off-by: Scott Telford <redacted> --- Documentation/devicetree/bindings/serial/cdns,uart.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.txt b/Documentation/devicetree/bindings/serial/cdns,uart.txt
index a3eb154..4fe7aae 100644
--- a/Documentation/devicetree/bindings/serial/cdns,uart.txt
+++ b/Documentation/devicetree/bindings/serial/cdns,uart.txt@@ -1,7 +1,8 @@ Binding for Cadence UART Controller Required properties: -- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps" +- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps" for Zynq and + "cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC uart controller. - reg: Should contain UART controller registers location and length. - interrupts: Should contain UART controller interrupts. - clocks: Must contain phandles to the UART clocks
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2.1.2