[PATCH 12/26] ARM: dts: r8a7792: add SD clocks
From: Simon Horman <hidden>
Date: 2016-08-15 08:55:31
Also in:
linux-renesas-soc
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Sergei Shtylyov <redacted> Describe the SDHI0 clock and its parent, SD clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <redacted> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <redacted> --- arch/arm/boot/dts/r8a7792.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 1b96bf6393fb..4148c5867c07 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi@@ -535,6 +535,13 @@ clock-div = <8>; clock-mult = <1>; }; + sd_clk: sd { + compatible = "fixed-factor-clock"; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-div = <8>; + clock-mult = <1>; + }; rcan_clk: rcan { compatible = "fixed-factor-clock"; clocks = <&pll1_div2_clk>;
@@ -564,6 +571,15 @@ >; clock-output-names = "sys-dmac1", "sys-dmac0"; }; + mstp3_clks: mstp3_clks at e615013c { + compatible = "renesas,r8a7792-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; + clocks = <&sd_clk>; + #clock-cells = <1>; + renesas,clock-indices = <R8A7792_CLK_SDHI0>; + clock-output-names = "sdhi0"; + }; mstp4_clks: mstp4_clks at e6150140 { compatible = "renesas,r8a7792-mstp-clocks", "renesas,cpg-mstp-clocks";
--
2.7.0.rc3.207.g0ac5344