[PATCH v3] Added perf functionality to mmdc driver
From: mark.rutland@arm.com (Mark Rutland)
Date: 2016-08-30 12:54:34
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Hi, On Tue, Aug 30, 2016 at 07:43:29PM +0800, Shawn Guo wrote:
On Mon, Aug 29, 2016 at 11:06:44AM -0500, Zhi Li wrote:quoted
On Wed, Aug 17, 2016 at 2:42 PM, Zhengyu Shen [off-list ref] wrote:quoted
MMDC is a multi-mode DDR controller that supports DDR3/DDR3L x16/x32/x64 and LPDDR2 two channel x16/x32 memory types. MMDC is configurable, high performance, and optimized. MMDC is present on i.MX6 Quad and i.MX6 QuadPlus devices, but this driver only supports i.MX6 Quad at the moment. MMDC provides registers for performance counters which read via this driver to help debug memory throughput and similar issues. $ perf stat -a -e mmdc/busy-cycles/,mmdc/read-accesses/,mmdc/read-bytes/,mmdc/total-cycles/,mmdc/write-accesses/,mmdc/write-bytes/ dd if=/dev/zero of=/dev/null bs=1M count=5000 Performance counter stats for 'dd if=/dev/zero of=/dev/null bs=1M count=5000': 898021787 mmdc/busy-cycles/ 14819600 mmdc/read-accesses/ 471.30 MB mmdc/read-bytes/ 2815419216 mmdc/total-cycles/ 13367354 mmdc/write-accesses/ 427.76 MB mmdc/write-bytes/ 5.334757334 seconds time elapsed Signed-off-by: Zhengyu Shen <redacted> Signed-off-by: Frank Li <frank.li@nxp.com>Shawn Guo: No new comments got more than 1 weeks. Did you plan accept it?@Mark, how do you think of this version?
Sorry, I've been away for the last week and haven't had the chance to look at this yet. I will try to get round to it in the next few days. In the meantime, could you please try attacking this with Vince's perf fuzzer [1] (as root, or with perf_event_paranoid dropped to -1)? It's rather good at finding (subtle) issues in drivers. Thanks, Mark. [1] https://github.com/deater/perf_event_tests