[PATCH v2 1/4] pwm: Add support for Meson PWM Controller

On Sun, Jul 10, 2016 at 11:24 AM, Neil Armstrong
[off-list ref] wrote:

according to the public (S905) datasheet the hardware wants "value
+1": "Selects the divider (N+1) for the PWM A clock"
so shouldn't this be pwm_pre_div = i + 1?
all your calculations below are already adding 1 to pwm_pre_div, but
pwm_pre_div is directly written to the hardware register in
meson_pwm_config()

+               pwm_cnt = DIV_ROUND_CLOSEST(period_ns,
+                               fin_ns * (pwm_pre_div + 1));
+               dev_dbg(chip->chip.dev, "fin_ns=%lu pre_div=%d cnt=%d\n",
+                               fin_ns, pwm_pre_div, pwm_cnt);
+               if (pwm_cnt <= 0xffff)
+                       break;
+       }
+       if (i == MISC_CLK_DIV_MASK) {
+               dev_err(chip->chip.dev, "Unable to get period pre_div");
+               return -EINVAL;
+       }
+       dev_dbg(chip->chip.dev, "period_ns=%d pre_div=%d pwm_cnt=%d\n",
+               period_ns, pwm_pre_div, pwm_cnt);
+
+       if (duty_ns == period_ns) {
+               pwm_chan->pwm_pre_div = pwm_pre_div;
+               pwm_chan->pwm_hi = pwm_cnt;
+               pwm_chan->pwm_lo = 0;
+       } else if (duty_ns == 0) {
+               pwm_chan->pwm_pre_div = pwm_pre_div;
+               pwm_chan->pwm_hi = 0;
+               pwm_chan->pwm_lo = pwm_cnt;
+       } else {
+               /* Then check is we can have the duty with the same pre_div */
+               pwm_duty_cnt = DIV_ROUND_CLOSEST(duty_ns,
+                                       fin_ns * (pwm_pre_div + 1));
+               if (pwm_cnt > 0xffff) {
+                       dev_err(chip->chip.dev, "Unable to get duty period, differences are too high");
+                       return -EINVAL;
+               }
+               dev_dbg(chip->chip.dev, "duty_ns=%d pre_div=%d pwm_cnt=%d\n",
+                       duty_ns, pwm_pre_div, pwm_duty_cnt);
+
+               pwm_chan->pwm_pre_div = pwm_pre_div;
+               pwm_chan->pwm_hi = pwm_duty_cnt;
+               pwm_chan->pwm_lo = pwm_cnt - pwm_chan->pwm_hi;
+       }
+
+       return 0;
+}
+
+static int meson_pwm_request(struct pwm_chip *chip,
+                                 struct pwm_device *pwm)
+{
+       struct meson_pwm_channel *pwm_chan;
+
+       pwm_chan = devm_kzalloc(chip->dev, sizeof(*pwm_chan), GFP_KERNEL);
+       if (!pwm_chan)
+               return -ENOMEM;
+
+       pwm_set_chip_data(pwm, pwm_chan);
+
+       return 0;
+}
+
+static void meson_pwm_free(struct pwm_chip *chip,
+                               struct pwm_device *pwm)
+{
+       devm_kfree(chip->dev, pwm_get_chip_data(pwm));
+       pwm_set_chip_data(pwm, NULL);
+}
+
+static int meson_pwm_enable(struct pwm_chip *chip,
+                                struct pwm_device *pwm)
+{
+       struct meson_pwm_chip *pwm_data = to_meson_pwm_chip(chip);
+       unsigned int id = pwm->hwpwm;
+       unsigned long flags;
+
+       spin_lock_irqsave(&pwm_data->lock, flags);
+       switch (id) {
+       case PWM_A:
+               writel(readl(pwm_data->base + REG_MISC_AB) | MISC_A_EN,
+                       pwm_data->base + REG_MISC_AB);
+               break;
+
+       case PWM_B:
+               writel(readl(pwm_data->base + REG_MISC_AB) | MISC_B_EN,
+                       pwm_data->base + REG_MISC_AB);
+               break;
+
+       default:
+               break;
+       }
+       spin_unlock_irqrestore(&pwm_data->lock, flags);
+
+       return 0;
+}
+
+static void meson_pwm_disable(struct pwm_chip *chip,
+                                  struct pwm_device *pwm)
+{
+       struct meson_pwm_chip *pwm_data = to_meson_pwm_chip(chip);
+       unsigned int id = pwm->hwpwm;
+       unsigned long flags;
+
+       spin_lock_irqsave(&pwm_data->lock, flags);
+       switch (id) {
+       case PWM_A:
+               writel(readl(pwm_data->base + REG_MISC_AB) & ~MISC_A_EN,
+                       pwm_data->base + REG_MISC_AB);
+               break;
+
+       case PWM_B:
+               writel(readl(pwm_data->base + REG_MISC_AB) & ~MISC_B_EN,
+                       pwm_data->base + REG_MISC_AB);
+               break;
+
+       default:
+               break;
+       }
+       spin_unlock_irqrestore(&pwm_data->lock, flags);
+}
+
+static int meson_pwm_config(struct pwm_chip *chip,
+                                struct pwm_device *pwm,
+                                int duty_ns,
+                                int period_ns)
+{
+       struct meson_pwm_chip *pwm_data = to_meson_pwm_chip(chip);
+       struct meson_pwm_channel *pwm_chan = pwm_get_chip_data(pwm);
+       unsigned int id = pwm->hwpwm;
+       int ret;
+
+       if ((~(pwm_data->inverter_mask >> id) & 0x1))
+               duty_ns = period_ns - duty_ns;
+
+       if (period_ns == pwm_chan->period && duty_ns == pwm_chan->duty)
+               return 0;
+
+       ret = meson_pwm_calc(pwm_data, pwm_chan, id, duty_ns, period_ns);
+       if (ret) {
+               dev_err(chip->dev, "error while calculating pwm parameters\n");
+               return ret;
+       }
+
+       switch (id) {
+       case PWM_A:
+               writel((readl(pwm_data->base + REG_MISC_AB) &
+                       ~(MISC_CLK_DIV_MASK << MISC_A_CLK_DIV_SHIFT)) |
+                       ((pwm_chan->pwm_pre_div << MISC_A_CLK_DIV_SHIFT) |
+                        MISC_A_CLK_EN),
+                       pwm_data->base + REG_MISC_AB);
+
+               writel((pwm_chan->pwm_hi << PWM_HIGH_SHIFT) |
+                      (pwm_chan->pwm_lo),
+                      pwm_data->base + REG_PWM_A);
+               break;
+
+       case PWM_B:
+               writel((readl(pwm_data->base + REG_MISC_AB) &
+                       ~(MISC_CLK_DIV_MASK << MISC_B_CLK_DIV_SHIFT)) |
+                       ((pwm_chan->pwm_pre_div << MISC_B_CLK_DIV_SHIFT) |
+                        MISC_B_CLK_EN),
+                       pwm_data->base + REG_MISC_AB);
+
+               writel((pwm_chan->pwm_hi << PWM_HIGH_SHIFT) |
+                      (pwm_chan->pwm_lo),
+                      pwm_data->base + REG_PWM_B);
+               break;
+
+       default:
+               break;
+       }
+
+       pwm_chan->period = period_ns;
+       pwm_chan->duty = duty_ns;
+
+       return 0;
+}
+
+static int meson_pwm_set_polarity(struct pwm_chip *chip,
+                                   struct pwm_device *pwm,
+                                   enum pwm_polarity polarity)
+{
+       struct meson_pwm_chip *pwm_data = to_meson_pwm_chip(chip);
+       struct meson_pwm_channel *pwm_chan = pwm_get_chip_data(pwm);
+       bool invert = (polarity == PWM_POLARITY_NORMAL);
+       unsigned long flags;
+
+       spin_lock_irqsave(&pwm_data->lock, flags);
+
+       if (invert)
+               pwm_data->inverter_mask |= BIT(pwm->hwpwm);
+       else
+               pwm_data->inverter_mask &= ~BIT(pwm->hwpwm);
+
+       meson_pwm_config(chip, pwm, pwm_chan->duty, pwm_chan->period);
+
+       spin_unlock_irqrestore(&pwm_data->lock, flags);
+
+       return 0;
+}
+
+static const struct pwm_ops meson_pwm_ops = {
+       .request        = meson_pwm_request,
+       .free           = meson_pwm_free,
+       .enable         = meson_pwm_enable,
+       .disable        = meson_pwm_disable,
+       .config         = meson_pwm_config,
+       .set_polarity   = meson_pwm_set_polarity,
+       .owner          = THIS_MODULE,
+};
+
+static const struct of_device_id meson_pwm_matches[] = {
+       { .compatible = "amlogic,meson8b-pwm", },
+       { .compatible = "amlogic,meson-gxbb-pwm", },
+       {},
+};
+MODULE_DEVICE_TABLE(of, meson_pwm_matches);
+
+static int meson_pwm_mux_init(struct meson_pwm_chip *chip)
+{
+       struct device *dev = &chip->pdev->dev;
+       struct clk_init_data init;
+       char clk_name[255];
+       int ret;
+       int i;
+
+       for (i = 0 ; i < PWM_NUM ; ++i) {
+               sprintf(clk_name, "%s#mux%d",
+                               of_node_full_name(dev->of_node), i);
+
+               init.name = devm_kstrdup(dev, clk_name, GFP_KERNEL);
+               init.ops = &clk_mux_ops;
+               init.flags = CLK_IS_BASIC;
+               init.parent_names = pwm_parents;
+               init.num_parents = 1 << MISC_CLK_SEL_WIDTH;
+
+               chip->mux[i].reg = chip->base + REG_MISC_AB;
+               chip->mux[i].shift = mux_reg_shifts[i];
+               chip->mux[i].mask = BIT(MISC_CLK_SEL_WIDTH) - 1;
+               chip->mux[i].flags = 0;
+               chip->mux[i].lock = &chip->lock;
+               chip->mux[i].table = NULL;
+               chip->mux[i].hw.init = &init;
+
+               chip->clk[i] = devm_clk_register(dev, &chip->mux[i].hw);
+               if (IS_ERR(chip->clk[i])) {
+                       dev_err(dev, "Failed to register %s\n", clk_name);
+                       return PTR_ERR(chip->clk[i]);
+               }
+
+               if (chip->clk_parents[i]) {
+                       ret = clk_set_parent(chip->clk[i],
+                                            chip->clk_parents[i]);
+                       if (ret) {
+                               dev_err(dev, "Failed to set %s parent\n",
+                                       clk_name);
+                               return ret;
+                       }
+               }
+       }
+
+       return 0;
+}
+
+static int meson_pwm_probe(struct platform_device *pdev)
+{
+       struct device *dev = &pdev->dev;
+       struct meson_pwm_chip *chip;
+       struct resource *res;
+       int ret;
+
+       chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
+       if (chip == NULL)
+               return -ENOMEM;
+
+       chip->pdev = pdev;
+
+       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       chip->base = devm_ioremap_resource(&pdev->dev, res);
+       if (IS_ERR(chip->base))
+               return PTR_ERR(chip->base);
+
+       chip->clk_parents[0] = devm_clk_get(dev, "clkin0");
+       if (IS_ERR(chip->clk_parents[0])) {
+               if (PTR_ERR(chip->clk_parents[0]) == -EPROBE_DEFER)
+                       return PTR_ERR(chip->clk_parents[0]);
+               chip->clk_parents[0] = NULL;
+       }
+
+       chip->clk_parents[1] = devm_clk_get(dev, "clkin1");
+       if (IS_ERR(chip->clk_parents[1])) {
+               if (PTR_ERR(chip->clk_parents[1]) == -EPROBE_DEFER)
+                       return PTR_ERR(chip->clk_parents[1]);
+               chip->clk_parents[1] = NULL;
+       }
+
+       ret = meson_pwm_mux_init(chip);
+       if (ret)
+               return ret;
+
+       clk_prepare_enable(chip->clk[0]);
+       clk_prepare_enable(chip->clk[1]);
+
+       chip->chip.dev = dev;
+       chip->chip.ops = &meson_pwm_ops;
+       chip->chip.base = -1;
+       chip->chip.npwm = PWM_NUM;
+       chip->chip.of_xlate = of_pwm_xlate_with_flags;
+       chip->chip.of_pwm_n_cells = 3;
+       chip->inverter_mask = BIT(PWM_NUM) - 1;
+
+       ret = pwmchip_add(&chip->chip);
+       if (ret < 0) {
+               dev_err(dev, "failed to register PWM chip\n");
+               return ret;
+       }
+
+       platform_set_drvdata(pdev, chip);
+
+       return 0;
+}
+
+static int meson_pwm_remove(struct platform_device *pdev)
+{
+       struct meson_pwm_chip *chip = platform_get_drvdata(pdev);
+
+       return pwmchip_remove(&chip->chip);
+}
+
+static struct platform_driver meson_pwm_driver = {
+       .driver         = {
+               .name   = "meson-pwm",
+               .of_match_table = of_match_ptr(meson_pwm_matches),
+       },
+       .probe          = meson_pwm_probe,
+       .remove         = meson_pwm_remove,
+};
+module_platform_driver(meson_pwm_driver);
+
+MODULE_ALIAS("platform:meson-pwm");
+MODULE_DESCRIPTION("Amlogic Meson PWM Generator driver");
+MODULE_AUTHOR("Neil Armstrong [off-list ref]");
+MODULE_LICENSE("Dual BSD/GPL");
--
2.7.0


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