It turns out that sun4i (A10) and sun5i (A13 & co) do not have sample
clocks, so make them optional.

Since these do not have sample clocks, they cannot (reliably) do
DDR rates, so only set MMC_CAP_1_8V_DDR when we do have sample clks.

Note this patch only changes the devm_clk_get error checking and sets
the clocks to NULL if they don't exists. All the clk_foo calls accept
a NULL clk and will return success when called with a NULL clk, so this
is all that is necessary.

Signed-off-by: Hans de Goede <redacted>
---
 drivers/mmc/host/sunxi-mmc.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 71a480b..4552ee0 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c

@@ -1016,14 +1016,20 @@ static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,

        host->clk_output = devm_clk_get(&pdev->dev, "output");
        if (IS_ERR(host->clk_output)) {
-               dev_err(&pdev->dev, "Could not get output clock\n");
-               return PTR_ERR(host->clk_output);
+               if (PTR_ERR(host->clk_output) != -ENOENT) {

+                       dev_err(&pdev->dev, "Could not get output clock\n");
+                       return PTR_ERR(host->clk_output);
+               }
+               host->clk_output = NULL;
        }

        host->clk_sample = devm_clk_get(&pdev->dev, "sample");
        if (IS_ERR(host->clk_sample)) {
-               dev_err(&pdev->dev, "Could not get sample clock\n");
-               return PTR_ERR(host->clk_sample);
+               if (PTR_ERR(host->clk_sample) != -ENOENT) {
+                       dev_err(&pdev->dev, "Could not get sample clock\n");
+                       return PTR_ERR(host->clk_sample);
+               }
+               host->clk_sample = NULL;
        }

        host->reset = devm_reset_control_get_optional(&pdev->dev, "ahb");

@@ -1126,9 +1132,11 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
        mmc->f_min              =   400000;
        mmc->f_max              = 52000000;
        mmc->caps              |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
-                                 MMC_CAP_1_8V_DDR |
                                  MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;

+       if (host->clk_output && host->clk_sample)
+               mmc->caps      |= MMC_CAP_1_8V_DDR;
+
        ret = mmc_of_parse(mmc);
        if (ret)
                goto error_free_dma;
--

2.7.4