[PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready

[PATCH v3 0/15] Changes to support 150 MHz eMMC on rk3399 · Douglas Anderson <dianders@chromium.org> · 2016-06-20
[PATCH v3 03/15] phy: rockchip-emmc: configure default output tap delay · Douglas Anderson <dianders@chromium.org> · 2016-06-20
[PATCH v3 05/15] phy: rockchip-emmc: Increase lock time allowance · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 05/15] phy: rockchip-emmc: Increase lock time allowance · Guenter Roeck <hidden> · 2016-06-20
Re: [PATCH v3 05/15] phy: rockchip-emmc: Increase lock time allowance · Doug Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 05/15] phy: rockchip-emmc: Increase lock time allowance · Guenter Roeck <hidden> · 2016-06-20
[PATCH v3 15/15] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 15/15] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 · Heiko Stübner <heiko@sntech.de> · 2016-06-22
[PATCH v3 12/15] Documentation: phy: Let the rockchip eMMC PHY get an exported card clock · Douglas Anderson <dianders@chromium.org> · 2016-06-20
[PATCH v3 06/15] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 06/15] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes · Adrian Hunter <adrian.hunter@intel.com> · 2016-06-22
[PATCH v3 11/15] mmc: sdhci-of-arasan: Add ability to export card clock · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 11/15] mmc: sdhci-of-arasan: Add ability to export card clock · Adrian Hunter <adrian.hunter@intel.com> · 2016-06-22
[PATCH v3 14/15] phy: rockchip-emmc: Set phyctrl_frqsel based on card clock · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 14/15] phy: rockchip-emmc: Set phyctrl_frqsel based on card clock · Heiko Stübner <heiko@sntech.de> · 2016-06-20
[PATCH v3 08/15] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 08/15] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 · Adrian Hunter <adrian.hunter@intel.com> · 2016-06-22
Re: [PATCH v3 0/15] Changes to support 150 MHz eMMC on rk3399 · Heiko Stübner <heiko@sntech.de> · 2016-06-20
[PATCH v3 09/15] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 09/15] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 · Heiko Stübner <heiko@sntech.de> · 2016-06-22
[PATCH v3 13/15] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off() · Douglas Anderson <dianders@chromium.org> · 2016-06-20
[PATCH v3 02/15] phy: rockchip-emmc: configure frequency range and drive impedance · Douglas Anderson <dianders@chromium.org> · 2016-06-20
[PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready · Guenter Roeck <hidden> · 2016-06-20
Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready · Doug Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready · Guenter Roeck <hidden> · 2016-06-20
Re: [PATCH v3 01/15] phy: rockchip-emmc: give DLL some extra time to be ready · Doug Anderson <dianders@chromium.org> · 2016-06-20
[PATCH v3 04/15] phy: rockchip-emmc: reindent the register definitions · Douglas Anderson <dianders@chromium.org> · 2016-06-20
Re: [PATCH v3 0/15] Changes to support 150 MHz eMMC on rk3399 · Ulf Hansson <hidden> · 2016-06-22

From: dianders@chromium.org (Doug Anderson)
Date: 2016-06-20 19:31:35
Also in: linux-devicetree, linux-mmc, linux-rockchip, lkml

Hi,

On Mon, Jun 20, 2016 at 12:23 PM, Guenter Roeck [off-list ref] wrote:

On Mon, Jun 20, 2016 at 10:56 AM, Douglas Anderson
[off-list ref] wrote:

quoted

From: Shawn Lin <shawn.lin@rock-chips.com>

According to the databook, 10.2us is the max time for dll to be ready to
work. However in testing, some chips need 20us for dll to be ready. This

Nitpick, but description (20uS) and code (more than 25 uS) don't match.

Good catch.  If I spin the series I'll fix this, otherwise I'll assume
that the person applying this (Ulf?) can fix the description at their
discretion.

-Doug

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