Thread (31 messages) 31 messages, 2 authors, 2016-05-31

[PATCH 08/17] pinctrl: uniphier: support 3-bit drive strength control

From: Linus Walleij <hidden>
Date: 2016-05-31 10:46:51
Also in: linux-gpio, lkml

On Tue, May 31, 2016 at 10:05 AM, Masahiro Yamada
[off-list ref] wrote:
The new ARMv8 SoC, PH1-LD20, supports more fine-grained drive
strength control.  Drive strength of some pins are controlled by
3-bit width registers (8-level granularity).

Signed-off-by: Masahiro Yamada <redacted>
Patch applied.

Yours,
Linus Walleij
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