Thread (14 messages) 14 messages, 4 authors, 2016-04-16

[PATCH 2/3] clk: ti: amx3xx: limit the maximum frequency of DPLLs based on spec

From: Stephen Boyd <hidden>
Date: 2016-04-16 00:27:03
Also in: linux-clk, linux-omap

On 03/16, Tero Kristo wrote:
AM33xx/AM43xx devices use the same DPLL IP blocks, which only support
maximum rate of 1GHz [1] for the default and 2GHz for the low-jitter type
DPLLs [2]. Reflect this limitation in the DPLL init code by adding the
max-rate parameter based on the DPLL types.

[1] Functional, integration & test specification for GS70 ADPLLS, Rev 1.0-01
[2] Functional, integration & test specification for GS70 ADPLLLJ, Rev 0.8-02

Signed-off-by: Tero Kristo <redacted>
Cc: Nishanth Menon <nm@ti.com>
Cc: Tomi Valkeinen <redacted>
Cc: Lokesh Vutla <redacted>
---
Applied to clk-next

-- 
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