[PATCH V17 1/3] dmaengine: qcom_hidma: implement lower level hardware interface
From: Sinan Kaya <hidden>
Date: 2016-04-26 15:23:18
Also in:
linux-arm-msm, linux-devicetree, lkml
On 4/26/2016 11:10 AM, Andy Shevchenko wrote:
On Tue, Apr 26, 2016 at 6:04 PM, Sinan Kaya [off-list ref] wrote:quoted
On 4/25/2016 11:28 PM, Vinod Koul wrote:quoted
On Mon, Apr 11, 2016 at 10:21:11AM -0400, Sinan Kaya wrote:quoted
quoted
quoted
+ while (cause) { + if ((cause & BIT(HIDMA_IRQ_TR_CH_INVALID_TRE_BIT_POS)) || + (cause & BIT(HIDMA_IRQ_TR_CH_TRE_RD_RSP_ER_BIT_POS)) || + (cause & BIT(HIDMA_IRQ_EV_CH_WR_RESP_BIT_POS)) || + (cause & BIT(HIDMA_IRQ_TR_CH_DATA_RD_ER_BIT_POS)) || + (cause & BIT(HIDMA_IRQ_TR_CH_DATA_WR_ER_BIT_POS))) {Switch pleaseCause is a combined status register. Let's say it contains 0x41. I need to check if bit 0 or bit 6 is set in this value for each case condition. The value is not 0x40 or 0x1. I created macro like this instead. +#define HIDMA_IS_ERR_INTERRUPT(cause) \ + (cause & BIT(HIDMA_IRQ_TR_CH_INVALID_TRE_BIT_POS)) || \ + (cause & BIT(HIDMA_IRQ_TR_CH_TRE_RD_RSP_ER_BIT_POS)) || \ + (cause & BIT(HIDMA_IRQ_EV_CH_WR_RESP_BIT_POS)) || \ + (cause & BIT(HIDMA_IRQ_TR_CH_DATA_RD_ER_BIT_POS)) || \ + (cause & BIT(HIDMA_IRQ_TR_CH_DATA_WR_ER_BIT_POS))This looks overheaded. #define HIDMA_XXX (BIT(a) | BIT (b) ... BIT(n))quoted
and replaced the if statement as follows if (HIDMA_IS_ERR_INTERRUPT(cause)) {if (cause & HIDMA_XXX) {
This is even better. -- Sinan Kaya Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project