On Fri, Apr 08, 2016 at 01:24:51PM +0900, Chanwoo Choi wrote:
quoted hunk ↗ jump to hunk
This patch adds the documentation for generic exynos bus frequency
driver.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <redacted>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
---
.../devicetree/bindings/devfreq/exynos-bus.txt | 95 ++++++++++++++++++++++
1 file changed, 95 insertions(+)
create mode 100644 Documentation/devicetree/bindings/devfreq/exynos-bus.txt
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
new file mode 100644
index 000000000000..78171b918e3f
--- /dev/null
+++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt
@@ -0,0 +1,95 @@
+* Generic Exynos Bus frequency device
+
+The Samsung Exynos SoC has many buses for data transfer between DRAM
+and sub-blocks in SoC. Most Exynos SoCs share the common architecture
+for buses. Generally, each bus of Exynos SoC includes a source clock
+and a power line, which are able to change the clock frequency
+of the bus in runtime. To monitor the usage of each bus in runtime,
+the driver uses the PPMU (Platform Performance Monitoring Unit), which
+is able to measure the current load of sub-blocks.
+
+There are a little different composition among Exynos SoC because each Exynos
+SoC has different sub-blocks. Therefore, shch difference should be specified
+in devicetree file instead of each device driver. In result, this driver
+is able to support the bus frequency for all Exynos SoCs.
I still have issues with this whole series. The DT hierarchy represents
buses. You are describing buses here and control of them. I would expect
to see some hierarchy, but there is none. What this looks like is you
are adding nodes based on what fits the current driver.
Rob