On Tue, Mar 29, 2016 at 12:15 AM, Amit Tomer [off-list ref] wrote:

Hello ,

quoted

+       SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
+                 SUNXI_FUNCTION(0x0, "gpio_in"),
+                 SUNXI_FUNCTION(0x1, "gpio_out"),
+                 SUNXI_FUNCTION(0x2, "mic"),           /* DATA */
+                 SUNXI_FUNCTION_IRQ(0x6, 11)),         /* EINT11 */
+};
+

Sorry to intervene here but is there any specific reason for not
covering Bank from PL0 - PL12(as it is mentioned in Datasheet) ?

The PL bank is a separate controller (R_PIO), and would be covered by
a separate driver.
See the other sunxi drivers.

ChenYu