Hi,

-----Original Message-----

From: geert.uytterhoeven@gmail.com

[mailto:geert.uytterhoeven at gmail.com] On Behalf Of Geert Uytterhoeven
Sent: Thursday, March 31, 2016 1:58 PM
To: Lakshmi Sai Krishna Potthuri <redacted>
Cc: Mark Brown <broonie@kernel.org>; Michal Simek <redacted>;
Soren Brinkmann [off-list ref]; David Woodhouse
[off-list ref]; Brian Norris [off-list ref];
Javier Martinez Canillas [off-list ref]; Boris Brezillon
[off-list ref]; Stephen Warren
[off-list ref]; Geert Uytterhoeven [off-list ref];
Andrew F. Davis [off-list ref]; Marek Vasut [off-list ref]; Jagan Teki
[off-list ref]; Rafa? Mi?ecki [off-list ref]; linux-
mtd at lists.infradead.org; linux-kernel at vger.kernel.org; linux-
spi at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Harini Katakam
[off-list ref]; Punnaiah Choudary Kalluri [off-list ref];
Anirudha Sarangi [off-list ref]; saikrishna12468 at gmail.com
Subject: Re: [LINUX PATCH 1/2] mtd: Added dummy entry in the spi_transfer
structure.

On Thu, Mar 31, 2016 at 8:14 AM, Lakshmi Sai Krishna Potthuri
[off-list ref] wrote:

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This is really not what I'd expect to happen, I'd expect that these

dummy

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cycles would be in addition to the actual data (see my request for better
documentation...).  If they overlap with the data then what is the point

in

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specifying this?  It's more work for the host, what benefit do we get

from

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doing it over just handing it like a normal byte?

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len field in the transfer structure contains dummy bytes along with actual

data

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bytes, controllers which requires dummy bytes use len field and simply

Ignore

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the dummy field (contains only no of cycles)added in this patch.

Controllers

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(like ZynqMP GQSPI) expects dummy in cycles won't work directly by

using

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len field because host driver doesn't know that len field of a particular

transfer

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includes dummy bytes or not (and also number of dummy bytes included

in

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len

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field). In such cases driver use this dummy field to identify the number of

dummy

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cycles and based on that it will send the required number of dummy

cycles

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(which

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i did in the second patch).

This doesn't make any sense at all to me.  Why does the controller care
what the bytes being sent to and from the device mean?

From the flash point of view, it expects the controller to send the dummy
on 1/2/4 lines based on the command. For Quad commands, flash expects
4 lines to be active during dummy phase. Similarly, 2 lines for dual
Commands and 1 line for normal/fast commands.
Since len field contains total number of cmd+addr+dummy bytes,
host driver should take care of sending these bytes on their respective
bus widths. Knowing when the dummy is being sent also helps in
the correct switching of IO pads (since the data lines are bidirectional)
ZynqMP GQSPI is a generic controller, majorly interfaced to flash devices.
It seems reasonable for it to know the above information from
the flash layer. Adding "dummy" cycles entry should be useful to any
controller that cares about it without affecting other spi/qspi controllers.

The m25p80 driver already uses dummy cycles, using real spi_transfer
structs, which have tx_nbits/rx_nbits fields to indicate how many data lines
to use.

m25p80 implementation just send command, address and dummy together
with tx_nbit field as 1 and host driver can't differentiate between them.
Command and address go on one line and dummy should send based
on the command as explained my previous mail.

Regards
Sai Krishna


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