[PATCH v11 4/9] arm64: add conditional instruction simulation support
From: Pratyush Anand <hidden>
Date: 2016-03-14 04:05:03
Also in:
lkml
From: Pratyush Anand <hidden>
Date: 2016-03-14 04:05:03
Also in:
lkml
On 13/03/2016:12:09:03 PM, Marc Zyngier wrote:
On Wed, 9 Mar 2016 00:32:18 -0500 David Long [off-list ref] wrote:quoted
+pstate_check_t * const opcode_condition_checks[16] = { + __check_eq, __check_ne, __check_cs, __check_cc, + __check_mi, __check_pl, __check_vs, __check_vc, + __check_hi, __check_ls, __check_ge, __check_lt, + __check_gt, __check_le, __check_al, __check_alThe very last entry seems wrong, or is at least the opposite of what the current code has. It should be something called __check_nv(), and always return false (condition code NEVER).
May be __check_nv() name is more appropriate as per definition, but shouldn't it still return true, because TRM says: "The condition code NV exists only to provide a valid disassembly of the 0b1111 encoding, otherwise its behavior is identical to AL" ~Pratyush