[RESEND PATCH v2 4/5] clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
STALE3858d
From: Xing Zheng <hidden>
Date: 2016-03-01 10:15:13
Also in:
linux-clk, linux-rockchip, lkml
Subsystem:
arm/rockchip soc support, common clk framework, the rest · Maintainers:
Heiko Stuebner, Stephen Boyd, Brian Masney, Jerome Brunet, Linus Torvalds
Revision v2 of 6 in this series.
Revisions (6)
Because there are some frac clock mux nodes don't need gate node on the RK3399. Signed-off-by: Xing Zheng <redacted> --- Changes in v2: None drivers/clk/rockchip/clk.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 36b4938..bfafd67 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h@@ -463,6 +463,22 @@ struct rockchip_clk_branch { .child = ch, \ } +#define COMPOSITE_FRACMUX_NOGATE(_id, cname, pname, f, mo, df, ch) \ + { \ + .id = _id, \ + .branch_type = branch_fraction_divider, \ + .name = cname, \ + .parent_names = (const char *[]){ pname }, \ + .num_parents = 1, \ + .flags = f, \ + .muxdiv_offset = mo, \ + .div_shift = 16, \ + .div_width = 16, \ + .div_flags = df, \ + .gate_offset = -1, \ + .child = ch, \ + } + #define MUX(_id, cname, pnames, f, o, s, w, mf) \ { \ .id = _id, \
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1.7.9.5