[PATCH 1/2] clocksource/drivers/lpc32xx: Support periodic mode
From: Joachim Eastwood <hidden>
Date: 2016-02-01 21:55:32
On 1 February 2016 at 16:09, Ezequiel Garcia [off-list ref] wrote:
On 31 January 2016 at 17:07, Ezequiel Garcia [off-list ref] wrote:quoted
On 30 January 2016 at 16:39, Joachim Eastwood [off-list ref] wrote:quoted
Hi Ezequiel, On 30 January 2016 at 07:46, Ezequiel Garcia [off-list ref] wrote:quoted
This commit adds the support for periodic mode. This is done by not setting the MR0S (Stop on TnMR0) bit on MCR, thus allowing interrupts to be periodically generated on MR0 matches. In order to do this, move the initial configuration that is specific to the one shot mode to clock_event_device.set_state_oneshot.[...]quoted
quoted
I will look more closely at the new timer setup later. btw, didn't I look through a version of this you sent me privately quite some time ago? I think I had a comment about using TIMER_PR instead of TIMER_MR0 then. Unsure if that is still valid, though.Ah, right. It was ages ago, and forgot your previous review. Sorry about that. Using TIMER_PR looks less invasive so I'll send a v2 using it instead.Actually, using the prescale counter and MR0 = 1 resulted in exactly half the number of interrupts that I expected (HZ / 2). Using this patch, with PR=0 and MR0=ticks_per_jiggies, I can see HZ no. of interrupts per sec. Why did you choose to use the prescale in your oneshot implementation?
The clockevent code was copied from arch/arm/mach-lpc32xx/timer.c so it's really old code. I think it is a strange way to use the timer, but the logic still seems good to me.
Did you test or measure the timer expire using the PR and MR0 = 1?
I really can't remember. I do remember going through the timer setup and it seemed like a valid, albeit slightly strange, way to use the timer.
To be honest, I'm still trying to make some sense out of my results.
I'll see if can find the time to do some more testing over here as well. regards, Joachim Eastwood