[PATCH] dt-bindings: arm, gic-v3: require that reserved cells are always 0

On 03/02/16 18:00, Will Deacon wrote:

The arm,gic-v3 binding was written with good intentions and doesn't
enforce interrupt-cells to be 3, therefore making it easy to extend
the irq description in future if necessary:

  > Cells 4 and beyond are reserved for future use.

Unfortunately, this sentence is immediately followed up with:

  > When the 1st cell has a value of 0 or 1, cells 4 and beyond act as
  > padding, and may be ignored. It is recommended that padding cells
  > have a value of 0.

Consequently, any extensions to the PPI or SPI interrupt specifiers must
be able to work with random crap from legacy DTs, effectively
necessitating a new interrupt type in the first cell. Sigh.

This patch fixes the text so that additional, reserved cells are
required to be zero. This looks like a reasonable thing to require and
is already satisifed by the .dts files in-tree.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <redacted>
Signed-off-by: Will Deacon <redacted>

Acked-by: Marc Zyngier <redacted>

	M.
-- 
Jazz is not dead. It just smells funny...