Thread (18 messages) 18 messages, 3 authors, 2016-02-18

[PATCH v3 1/5] arm64/perf: Rename Cortex A57 events

From: Will Deacon <hidden>
Date: 2016-02-18 11:24:24
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On Thu, Feb 18, 2016 at 10:13:07AM +0100, Jan Glauber wrote:
On Mon, Feb 15, 2016 at 08:06:13PM +0000, Will Deacon wrote:
quoted
On Mon, Feb 15, 2016 at 07:40:37PM +0000, Will Deacon wrote:
quoted
On Wed, Feb 03, 2016 at 06:11:56PM +0100, Jan Glauber wrote:
quoted
The implemented Cortex A57 events are not A57 specific.
They are recommended by ARM and can be found on other
ARMv8 SOCs like Cavium ThunderX too. Therefore move
these events to the common PMUv3 table.
I can't find anything in the architecture that suggests these event
numbers are necessarily portable between implementations. Am I missing
something?
Aha, I just noticed appendix K3.1 (silly me for missing it...).

Lemme check whether or not that mandates that those encodings can't be
used for wildly different things.
To me it looks like we would just have duplicated code without the patch,
and at least the event types (e.g. L1D_CACHE_RD) should be identical
across implementations.

But I don't care too much, so please tell me if should drop the patch or
keep it.
Tell you what then -- how about we simply rename those to ARMV8_IMPDEF_*
instead of ARMV8_A57_*? That way, we can easily identify them as distinct
from the architected events if we need to in future.

Will
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