* Ivaylo Dimitrov [off-list ref] [160208 12:15]:

Hi

On  8.02.2016 21:36, Tony Lindgren wrote:

quoted

OK. So probably the INT or RDY polarity made the ECC not work.

Well, ECC disable bit (ONENAND_SYS_CFG1_NO_ECC) was set as well, so most
probably it was the bugger :)

Oh OK that explains.

quoted

Aaro, care to dump out also the nolo configured CFG1 value from
n8x0 and n9(50)?

You can do it by adding something like this to the beginning
of set_onenand_cfg():

Also, do not forget to restore HWMOD_INIT_NO_RESET in gpmc_hwmod in question
and (maybe) revert e7b11dc7b77bfce0a351230a5feeadc1d0bba997.

Probably just enabling CONFIG_OMAP_GPMC_DEBUG allows dumping
the GPMC configuration. And it sounds like it's a good idea
to have this patch enabled.

Regards,

Tony