[PATCH v2] arm64: kernel: fix architected PMU registers unconditional access

Hi Guenter,

On Fri, Jan 22, 2016 at 06:17:49PM -0800, Guenter Roeck wrote:

On 01/13/2016 06:50 AM, Lorenzo Pieralisi wrote:

quoted

The Performance Monitors extension is an optional feature of the
AArch64 architecture, therefore, in order to access Performance
Monitors registers safely, the kernel should detect the architected
PMU unit presence through the ID_AA64DFR0_EL1 register PMUVer field
before accessing them.

This patch implements a guard by reading the ID_AA64DFR0_EL1 register
PMUVer field to detect the architected PMU presence and prevent accessing
PMU system registers if the Performance Monitors extension is not
implemented in the core.

Fixes: 60792ad349f3 ("arm64: kernel: enforce pmuserenr_el0 initialization and restore")
Signed-off-by: Lorenzo Pieralisi <redacted>
Reported-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: Will Deacon <redacted>
Cc: Peter Maydell <redacted>
Cc: Mark Rutland <mark.rutland@arm.com>

Hi,

this patch is still missing in mainline.

Did it get lost ?

No it did not, it will be sent shortly, thanks.

Lorenzo