[PATCH 11/13] dtb: amd: Add PCIe SMMU device tree node
From: Will Deacon <hidden>
Date: 2016-01-28 14:28:02
Also in:
linux-devicetree, lkml
From: Will Deacon <hidden>
Date: 2016-01-28 14:28:02
Also in:
linux-devicetree, lkml
On Thu, Jan 28, 2016 at 03:17:33PM +0100, Arnd Bergmann wrote:
On Thursday 28 January 2016 12:20:58 Robin Murphy wrote:quoted
quoted
Will, Robin, thoughts?Any IDs specified here would only apply to DMA by the "platform device" side of the host controller itself (as would an equivalent "iommus" property on pcie0 once I finish the SMMUv2 generic binding support I'm working on). In terms of PCI devices, the "mmu-masters" property is overloaded such that only its existence matters, to identify that there _is_ a relationship between the SMMU and the PCI bus(es) behind that host controller.I wasn't aware that this was actually still specified. I had hoped we were getting rid of mmu-masters before anyone actually started using it, but now I see it in ns2.dtsi and fsl-ls2080a.dtsi. Does anyone know what happened to the plan to use the iommu DT binding for the ARM SMMU instead? Do we now have to support both ways indefinitely?
We always did -- Seattle used the mmu-masters binding before the generic binding even existed. Robin has been working on patches to get of_xlate up and running, but it got held up by Laurent's series which didn't end up going anywhere. Will