Thread (5 messages) 5 messages, 3 authors, 2015-12-11

[PATCH] clk: ti: omap5+: dpll: implement errata i810

From: tony@atomide.com (Tony Lindgren)
Date: 2015-12-03 16:48:18
Also in: linux-clk, linux-omap

* Tero Kristo [off-list ref] [151130 06:44]:
+	/*
+	 * Errata i810 - DPLL controller can get stuck while transitioning
+	 * to a power saving state. Software must ensure the DPLL can not
+	 * transition to a low power state while changing M/N values.
+	 * Easiest way to accomplish this is to prevent DPLL autoidle
+	 * before doing the M/N re-program.
+	 */
+	errata_i810 = ti_clk_get_features()->flags & TI_CLK_ERRATA_I810;
+
+	if (errata_i810) {
+		ai = omap3_dpll_autoidle_read(clk);
+		if (ai) {
+			omap3_dpll_deny_idle(clk);
+
+			/* OCP barrier */
+			omap3_dpll_autoidle_read(clk);
+		}
+	}
Should we just do this unconditionally? It seems like disabling the
autoidle always before reprogramming is a good idea.

Regards,

Tony
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