[PATCH 05/19] clk: sunxi: add DRAM gates
From: Chen-Yu Tsai <hidden>
Date: 2015-11-09 04:19:12
Also in:
dri-devel, linux-clk, linux-devicetree, lkml
On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard [off-list ref] wrote:
The Allwinner SoCs have a gate controller to gate the access to the DRAM clock to the some devices that need to access the DRAM directly (mostly display / image related IPs). Use a simple gates driver to support it. Signed-off-by: Maxime Ripard <redacted>
Acked-by: Chen-Yu Tsai <redacted>
quoted hunk ↗ jump to hunk
--- drivers/clk/sunxi/clk-simple-gates.c | 2 ++ 1 file changed, 2 insertions(+)diff --git a/drivers/clk/sunxi/clk-simple-gates.c b/drivers/clk/sunxi/clk-simple-gates.c index 0214c6548afd..5666c767fa14 100644 --- a/drivers/clk/sunxi/clk-simple-gates.c +++ b/drivers/clk/sunxi/clk-simple-gates.c@@ -112,6 +112,8 @@ CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk", sunxi_simple_gates_init); CLK_OF_DECLARE(sun5i_a13_apb1, "allwinner,sun5i-a13-apb1-gates-clk", sunxi_simple_gates_init); +CLK_OF_DECLARE(sun5i_a13_dram, "allwinner,sun5i-a13-dram-gates-clk", + sunxi_simple_gates_init); CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-gates-clk", sunxi_simple_gates_init); CLK_OF_DECLARE(sun6i_a31_apb1, "allwinner,sun6i-a31-apb1-gates-clk", --2.6.2