On Mon, Sep 14, 2015 at 03:55:50PM +0100, Tomasz Nowicki wrote:

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quoted

Well, I still have not figured out whether on arm64 the raw accessors
required by ACPICA make sense.

So either arm64 relies on the generic MCFG based raw read and writes
or we define the global raw read and writes as empty (ie x86 overrides
them anyway).

My concerns/ideas related to raw accessors for ARM64, please correct me 
at any point.

ACPI spec - chapter: 19.5.96 OperationRegion (Declare Operation Region)
defines PCI_Config as one of region types. Every time ASL opcode 
operates on corresponding PCI config space region, ASL interpreter is 
dispatching address space to our raw accessors, please see 
acpi_ex_pci_config_space_handler, acpi_ev_pci_config_region_setup calls. 
What is more important, such operations may happen after (yes after) bus 
enumeration, but always raw accessors are called at the end with the 
{segment, bus, dev, fn} tuple.

Giving above, here are some ideas:
1. We force somehow vendors to avoid operations on PCI config regions in 
ASL code. PCI config region definitions still fall into Hardware Reduced 
profile, so new ACPICA special subset for ARM64 is need. Then raw ACPI 
accessors can be empty (and overridden by x86).

I am coming back to this, I am not sure that PCI config based OperationRegions
fall into Hardware Reduced profile, I will finally start a thread on ASWG
to check that.

Other than that, are you posting an updated version of this series soon ?
Let me know if you need help refactoring/testing the patches.

Thanks,
Lorenzo

2. We provide raw accessors which translate {segment, bus, dev, fn} 
tuple to Linux generic accessors (this can be considered only if PCI 
config accesses happened after bus enumeration for HR profile, thus 
tuple to bus structure map is possible).
4. We rely on the generic MCFG based raw read and writes.

Let me know your opinion.

Thanks,
Tomasz