[PATCH v4 3/4] drivers: clk: st: Correct the pll-type for A9 for stih418

[PATCH v4 0/4] ST PLL improvement · Gabriel Fernandez <hidden> · 2015-10-07
[PATCH v4 2/4] drivers: clk: st: PLL rate change implementation for DVFS · Gabriel Fernandez <hidden> · 2015-10-07
Re: [PATCH v4 2/4] drivers: clk: st: PLL rate change implementation for DVFS · Stephen Boyd <hidden> · 2015-10-07
[PATCH v4 4/4] ARM: STi: DT: Add support for stih418 A9 pll · Gabriel Fernandez <hidden> · 2015-10-07
[PATCH v4 3/4] drivers: clk: st: Correct the pll-type for A9 for stih418 · Gabriel Fernandez <hidden> · 2015-10-07
Re: [PATCH v4 3/4] drivers: clk: st: Correct the pll-type for A9 for stih418 · Stephen Boyd <hidden> · 2015-10-07
[PATCH v4 1/4] drivers: clk: st: Support for enable/disable in Clockgen PLLs · Gabriel Fernandez <hidden> · 2015-10-07
Re: [PATCH v4 1/4] drivers: clk: st: Support for enable/disable in Clockgen PLLs · Stephen Boyd <hidden> · 2015-10-07

From: Stephen Boyd <hidden>
Date: 2015-10-07 19:15:09
Also in: linux-clk, linux-devicetree, lkml

On 10/07, Gabriel Fernandez wrote:

Add support for new PLL-type for stih418 A9-PLL.
Currently the 407_A9_PLL type being used, it is corrected with this patch
4600c28 PLL allows to reach higher frequencies
so its programming algorithm is extended.

Signed-off-by: Pankaj Dev <redacted>
Signed-off-by: Gabriel Fernandez <redacted>
---

Applied to clk-next

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