[PATCH v3 2/4] drivers: clk: st: PLL rate change implementation for DVFS
From: Stephen Boyd <hidden>
Date: 2015-10-06 18:06:22
Also in:
linux-clk, linux-devicetree, lkml
On 10/05, Gabriel Fernandez wrote:
quoted hunk ↗ jump to hunk
@@ -452,7 +651,7 @@ static const struct clk_ops st_pll1200c32_ops = { static struct clk * __init clkgen_pll_register(const char *parent_name, struct clkgen_pll_data *pll_data, void __iomem *reg, - const char *clk_name) + const char *clk_name, spinlock_t *lock)
Is there a reason we pass lock here but never use it in this function?
{
struct clkgen_pll *pll;
struct clk *clk;-- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project