[PATCH 1/4] memory: pl172: correct MPMC peripheral ID register bits
From: vz@mleia.com (Vladimir Zapolskiy)
Date: 2015-09-28 16:51:18
Subsystem:
arm/lpc18xx architecture, memory controller drivers, the rest · Maintainers:
Vladimir Zapolskiy, Krzysztof Kozlowski, Linus Torvalds
According to PL172 TRM read of bits [7:6] of MPMCPeriphID3 is undefined, so unmask them. Also the driver supports all currently present revisions of PL172, this allows to alleviate requirements to the revision version matched by the driver. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> --- drivers/memory/pl172.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/memory/pl172.c b/drivers/memory/pl172.c
index b2ef6072..95a4ad7 100644
--- a/drivers/memory/pl172.c
+++ b/drivers/memory/pl172.c@@ -278,9 +278,10 @@ static int pl172_remove(struct amba_device *adev) } static const struct amba_id pl172_ids[] = { + /* PrimeCell MPMC PL172, EMC found on NXP LPC18xx and LPC43xx */ { - .id = 0x07341172, - .mask = 0xffffffff, + .id = 0x07041172, + .mask = 0x3f0fffff, }, { 0, 0 }, };
--
2.1.4