Thread (16 messages) 16 messages, 4 authors, 2015-08-06

[RFCv3 1/4] docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.

From: moritz.fischer@ettus.com (Moritz Fischer)
Date: 2015-08-05 19:43:19
Also in: linux-devicetree, lkml

Michal,

On Tue, Aug 4, 2015 at 8:10 AM, Philipp Zabel [off-list ref] wrote:
Hi Moritz,

Am Dienstag, den 04.08.2015, 08:05 -0700 schrieb Moritz Fischer:
quoted
Hi Philip,

On Tue, Aug 4, 2015 at 1:09 AM, Philipp Zabel [off-list ref] wrote:
quoted
Hi Moritz,

Am Donnerstag, den 30.07.2015, 18:13 -0700 schrieb Moritz Fischer:
[...]
quoted
quoted
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+Required properties:
+- compatible: "xlnx,zynq-reset"
+- reg: SLCR offset and size taken via syscon <0x200 0x48>
+- syscon: <&slcr>
+  This should be a phandle to the Zynq's SLCR register.
                                                 ^ register singular?
Do you want me to resend the entire set, or are you cool with just git
amending the 's' for registers?
Amended and applied, thanks.
Will you take 4/4 and 2/4 via your tree?
regards
Philipp
Thanks,

Moritz
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