[PATCH v4 2/2] dt: power: st: Provide bindings for ST's OPPs
From: Lee Jones <hidden>
Date: 2015-07-28 15:43:38
Also in:
linux-devicetree, linux-pm, lkml
On Tue, 28 Jul 2015, Rob Herring wrote:
On Tue, Jul 28, 2015 at 9:39 AM, Lee Jones [off-list ref] wrote:quoted
On Tue, 28 Jul 2015, Rob Herring wrote:quoted
On Mon, Jul 27, 2015 at 10:20 AM, Lee Jones [off-list ref] wrote:quoted
These OPPs are used in ST's CPUFreq implementation. Signed-off-by: Lee Jones <redacted> --- Changelog: - None, new patch Documentation/devicetree/bindings/power/opp-st.txt | 76 ++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/opp-st.txtdiff --git a/Documentation/devicetree/bindings/power/opp-st.txt b/Documentation/devicetree/bindings/power/opp-st.txt new file mode 100644 index 0000000..6eb2a91 --- /dev/null +++ b/Documentation/devicetree/bindings/power/opp-st.txt@@ -0,0 +1,76 @@ +STMicroelectronics OPP (Operating Performance Points) Bindings +-------------------------------------------------------------- + +Frequency Scaling only +---------------------- + +Located in CPU's node: + +- operating-points : [See: ./opp.txt] + +Example [safe] +-------------- + +cpus { + cpu at 0 { + /* kHz uV */ + operating-points = <1500000 0 + 1200000 0 + 800000 0 + 500000 0>; + }; +}; + +Dynamic Voltage and Frequency Scaling (DVFS) +-------------------------------------------- + +Located in 'cpu0-opp-list' node [to be provided ONLY by the bootloader]: + +- compatible : Should be "operating-points-v2-sti" +- opp{1..N} : Each 'oppX' subnode will contain the following properties: + - opp-hz : CPU frequency [Hz] for this OPP [See: ./opp.txt] + - st,avs : List of available voltages [uV] indexed by process codeAdd a unit suffix (-microvolt).Sure.quoted
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+ - st,cuts : Cut version this OPP is suitable for [0xFF means ALL] + - st,substrate : Substrate version this OPP is suitable for [0xFF means ALL]How about not present means all?I think that would be an unsafe assumption. If it's forgotten, then we may try to run an invalid/dangerous voltage/frequency combination. I'd really like 'all' to be defined an deliberate.Okay.quoted
quoted
quoted
+- st,syscfg : Phandle to Major number register + First cell: offset to major number +- st,syscfg-eng : Phandle to Minor number and Pcode registers + First cell: offset to process code + Second cell: offset to minor numberWould the proposed nvmem binding work for this?We already use sysconf for all of this type of stuff, as this information is contained in ST's Sysconf banks. Moving over to a new API would be a huge move and would require lots of planning discussions with ST.Okay.
Thanks. I'm going to fix up your suggestions above and add your Ack to make Viresh happy. :) Thanks Rob. -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog