Thread (11 messages) 11 messages, 5 authors, 2015-08-07

[PATCH 3/4] ARM: dts: rockchip: Add SPDIF transceiver for RK3188

From: heiko@sntech.de (Heiko Stübner)
Date: 2015-07-28 14:21:05
Also in: alsa-devel, linux-rockchip, lkml

Hi,

Am Dienstag, 28. Juli 2015, 14:03:30 schrieb Sjoerd Simons:
quoted hunk ↗ jump to hunk
Add the SPDIF transceiver controller and pin for RK3188

Signed-off-by: Sjoerd Simons <redacted>
---
 arch/arm/boot/dts/rk3188.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 0f23aed..43e9bdf 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -121,6 +121,22 @@
 		status = "disabled";
 	};

+	spdif: spdif at 0x1011e000 {
node names without 0x -> "spdif at 1011e000"

+		compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
+		reg = <0x1011e000 0x2000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spdif_tx>;
+		dmas = <&dmac1_s 8>;
+		dma-names = "tx";
+		clock-names = "spdif_hclk", "spdif_clk";
+		clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
+		status = "disabled";
+		#sound-dai-cells = <0>;
if you're submitting a v2, could you try ordering stuff like this?

+		compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
+		reg = <0x1011e000 0x2000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		#sound-dai-cells = <0>;
+		clock-names = "spdif_hclk", "spdif_clk";
+		clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
+		dmas = <&dmac1_s 8>;
+		dma-names = "tx";
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&spdif_tx>;
+		status = "disabled";

The ordering I try to keep is "compatible", "reg", [everything else sorted 
alphabetically], "status"
quoted hunk ↗ jump to hunk
+	};
+
 	cru: clock-controller at 20000000 {
 		compatible = "rockchip,rk3188-cru";
 		reg = <0x20000000 0x1000>;
@@ -462,6 +478,12 @@
 						<RK_GPIO1 21 RK_FUNC_1 &pcfg_pull_none>;
 			};
 		};
+
+		spdif {
+			spdif_tx: spdif-tx {
+				rockchip,pins = <RK_GPIO1 14 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
 	};
 };
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