[PATCHv4 03/10] arm/dts: dra7xx: add 'ti,set-rate-parent' for dss_dss_clk
From: Tero Kristo <hidden>
Date: 2015-06-02 06:57:35
Also in:
linux-devicetree, linux-omap
On 06/01/2015 09:23 AM, Tomi Valkeinen wrote:
We need set-rate-parent flags for the display's clock path so that the DSS driver can change the clock rate of the PLL. This patchs adds the ti,set-rate-parent flag to 'dss_dss_clk' clock node, which is only a gate clock, allowing the setting of the clock rate to propagate to the PLL. Signed-off-by: Tomi Valkeinen <redacted> Cc: devicetree at vger.kernel.org
Acked-by: Tero Kristo <redacted>
quoted hunk ↗ jump to hunk
--- arch/arm/boot/dts/dra7xx-clocks.dtsi | 1 + 1 file changed, 1 insertion(+)diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 470f39c4e326..357bedeebfac 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi@@ -1531,6 +1531,7 @@ clocks = <&dpll_per_h12x2_ck>; ti,bit-shift = <8>; reg = <0x1120>; + ti,set-rate-parent; }; dss_hdmi_clk: dss_hdmi_clk {