Le 10 mars 2015 19:35:19 GMT+01:00, Daniel Lezcano [off-list ref] a ?crit :

On 03/10/2015 07:05 PM, Thomas Petazzoni wrote:

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Hello Daniel,

I know you suggested a more rigorous method of determining the exit
latency and target residency times, but would it be nonetheless
possible to apply this patch, which clearly improves performance a

lot,

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and actually makes the code match the values used in the vendor

kernel?

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I also think this patch should be marked for stable, it fixes values
introduced in commit b858fbc1919720f7f54360098ece03b383e961fa, and
should therefore be backported all the way to v3.16.

I don't have a problem to apply this patch. But I would like to have 
confirmation from one of the Armada maintainers the tradeoff is
accepted 
(less energy saving for more performance).

Hi Daniel,

I already gave my acked- by for this patch, so for me this tradeoff
is acceptable.

Gr?gory

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On Fri, 13 Feb 2015 15:55:03 +0100 (CET), s. rannou wrote:

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Originally, the thresholds used in the cpuidle driver for Armada

SOCs

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were temporarily chosen, leaving room for improvements.

This commit updates the thresholds for the Armada XP SOCs with

values

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that positively impact performances:

                                 without patch  with patch   vendor

kernel

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  - iperf localhost (gbit/sec)   ~3.7           ~6.4         ~5.4
  - ioping tmpfs (iops)          ~163k          ~206k        ~179k
  - ioping tmpfs (mib/s)         ~636           ~805         ~699

The idle power consumption is negatively impacted (proportionally

less

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than the performance gain), and we are still performing better than
the vendor kernel here:

                                 without patch   with patch  vendor

kernel

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  - power consumption idle (W)   ~2.4            ~3.2        ~4.4
  - power consumption busy (W)   ~8.6            ~8.3        ~8.6

There is still room for improvement regarding the value of these
thresholds, they were chosen to mimic the vendor kernel.

This patch only impacts Armada XP SOCs and was tested on Online Labs
C1 boards. A similar approach can be taken to improve the

performances

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of the Armada 370 and Armada 38x SOCs.

Thanks a lot to Thomas Petazzoni, Gregory Clement and Willy Tarreau
for the discussions and tips around this topic.

Signed-off-by: Sebastien Rannou <redacted>
---
  drivers/cpuidle/cpuidle-mvebu-v7.c | 8 ++++----
  1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/cpuidle/cpuidle-mvebu-v7.c

b/drivers/cpuidle/cpuidle-mvebu-v7.c

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index 38e6861..3716a1f 100644

--- a/drivers/cpuidle/cpuidle-mvebu-v7.c
+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c

@@ -50,17 +50,17 @@ static struct cpuidle_driver

armadaxp_idle_driver = {

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  	.states[0]		= ARM_CPUIDLE_WFI_STATE,
  	.states[1]		= {
  		.enter			= mvebu_v7_enter_idle,
-		.exit_latency		= 10,
+		.exit_latency		= 100,
  		.power_usage		= 50,
-		.target_residency	= 100,
+		.target_residency	= 1000,
  		.name			= "MV CPU IDLE",
  		.desc			= "CPU power down",
  	},
  	.states[2]		= {
  		.enter			= mvebu_v7_enter_idle,
-		.exit_latency		= 100,
+		.exit_latency		= 1000,
  		.power_usage		= 5,
-		.target_residency	= 1000,
+		.target_residency	= 10000,
  		.flags			= MVEBU_V7_FLAG_DEEP_IDLE,
  		.name			= "MV CPU DEEP IDLE",
  		.desc			= "CPU and L2 Fabric power down",

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