[PATCH 2/6] clk: mediatek: Add initial common clock support for Mediatek SoCs.
From: joe@perches.com (Joe Perches)
Date: 2015-03-30 17:55:52
Also in:
linux-mediatek, lkml
On Mon, 2015-03-30 at 19:40 +0200, Sascha Hauer wrote:
This patch adds common clock support for Mediatek SoCs, including plls, muxes and clock gates.
trivia:
quoted hunk ↗ jump to hunk
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c
+static int mtk_cg_bit_is_cleared(struct clk_hw *hw)
+{[]
+ return val == 0;
+}
+
+static int mtk_cg_bit_is_set(struct clk_hw *hw)
+{[]
+ return val != 0; +}
These functions may be better returning a bool
quoted hunk ↗ jump to hunk
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
[]
+struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num)
+{[]
+ for (i = 0; i < clk_num; ++i)
[]
+void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num,
+ struct clk_onecell_data *clk_data)
+{
+ for (i = 0; i < num; i++) {Please use consistent postfix ++ style