@@ -22,19 +22,13 @@ extern void __init at91_init_sram(int bank, unsigned long base,
 
  /* Processors */
 extern void __init at91rm9200_set_type(int type);
-extern void __init at91_initialize(unsigned long main_clock);
 extern void __init at91rm9200_dt_initialize(void);
 extern void __init at91_dt_initialize(void);
 
  /* Interrupts */
-extern void __init at91_init_irq_default(void);
-extern void __init at91_init_interrupts(unsigned int priority[]);
 extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
 extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
 
- /* Devices */
-extern void __init at91_register_devices(void);
-
  /* Timer */
 extern void __init at91_init_time(void);
 extern void at91rm9200_ioremap_st(u32 addr);

@@ -42,19 +36,12 @@ extern void at91rm9200_timer_init(void);
 extern void at91sam926x_ioremap_pit(u32 addr);
 extern void at91sam926x_pit_init(int irq);
 
- /* Power Management */
-extern void at91_irq_suspend(void);
-extern void at91_irq_resume(void);
-
 /* idle */
 extern void at91sam9_idle(void);
 
 /* Matrix */
 extern void at91_ioremap_matrix(u32 base_addr);
 
-/* Ram Controler */
-extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
-
  /* GPIO */
 #define AT91RM9200_PQFP		3	/* AT91RM9200 PQFP package has 3 banks */
 #define AT91RM9200_BGA		4	/* AT91RM9200 BGA package has 4 banks */

@@ -42,31 +42,9 @@ void __init at91rm9200_set_type(int type)
 		at91_get_soc_subtype(&at91_soc_initdata));
 }
 
-void __init at91_init_irq_default(void)
-{
-	at91_init_interrupts(at91_boot_soc.default_irq_priority);
-}
-
-void __init at91_init_interrupts(unsigned int *priority)
-{
-	/* Enable GPIO interrupts */
-	at91_gpio_irq_setup();
-}
-
 void __iomem *at91_ramc_base[2];
 EXPORT_SYMBOL_GPL(at91_ramc_base);
 
-void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
-{
-	if (id < 0 || id > 1) {
-		pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
-		BUG();
-	}
-	at91_ramc_base[id] = ioremap(addr, size);
-	if (!at91_ramc_base[id])
-		panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr);
-}
-
 static struct map_desc sram_desc[2] __initdata;
 
 void __init at91_init_sram(int bank, unsigned long base, unsigned int length)

@@ -414,7 +392,6 @@ void __init at91_ioremap_matrix(u32 base_addr)
 		panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
 }
 
-#if defined(CONFIG_OF)
 static struct of_device_id ramc_ids[] = {
 	{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
 	{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },

@@ -456,10 +433,6 @@ void __init at91rm9200_dt_initialize(void)
 {
 	at91_dt_ramc();
 
-	/* Register the processor-specific clocks */
-	if (at91_boot_soc.register_clocks)
-		at91_boot_soc.register_clocks();
-
 	at91_boot_soc.init();
 }
 

@@ -467,33 +440,6 @@ void __init at91_dt_initialize(void)
 {
 	at91_dt_ramc();
 
-	/* Register the processor-specific clocks */
-	if (at91_boot_soc.register_clocks)
-		at91_boot_soc.register_clocks();
-
 	if (at91_boot_soc.init)
 		at91_boot_soc.init();
 }
-#endif
-
-void __init at91_initialize(unsigned long main_clock)
-{
-	at91_boot_soc.ioremap_registers();
-
-	/* Register the processor-specific clocks */
-	at91_boot_soc.register_clocks();
-
-	at91_boot_soc.init();
-
-	pinctrl_provide_dummies();
-}
-
-void __init at91_register_devices(void)
-{
-	at91_boot_soc.register_devices();
-}
-
-void __init at91_init_time(void)
-{
-	at91_boot_soc.init_time();
-}

@@ -6,14 +6,8 @@
 
 struct at91_init_soc {
 	int builtin;
-	u32 extern_irq;
-	unsigned int *default_irq_priority;
 	void (*map_io)(void);
-	void (*ioremap_registers)(void);
-	void (*register_clocks)(void);
-	void (*register_devices)(void);
 	void (*init)(void);
-	void (*init_time)(void);
 };
 
 extern struct at91_init_soc at91_boot_soc;