On Sun, Nov 09, 2014 at 09:18:10AM -0300, Ezequiel Garcia wrote:

On 11/09/2014 06:41 AM, Thomas Petazzoni wrote:

quoted

Jason, Ezequiel,

On Sun, 9 Nov 2014 00:23:48 -0500, Jason Cooper wrote:

quoted

On Wed, Oct 22, 2014 at 10:43:40AM -0300, Ezequiel Garcia wrote:

quoted

This patchset enables support for perf hardware events, by enabling the PMU
interrupts in the irqchip driver.

While doing this, we noticed the driver could use some cleaning to simplify
the overly complex implementation of the .map(), .unmask() and .mask()
functions.

The first three patches are the result of this cleaning effort, while the
rest of the series is the Perf support for Armada 375 and Armada 38x SoCs.

The series is based on v3.18-rc1.

Ezequiel Garcia (7):
  irqchip: armada-370-xp: Simplify interrupt map, mask and unmask
  irqchip: armada-370-xp: Initialize per cpu registers when CONFIG_SMP=N
  irqchip: armada-370-xp: Introduce a is_percpu_irq() helper for
    readability
  irqchip: armada-370-xp: Enable Performance Counter interrupts

Patches 1 to 4 tentatively applied to irqchip/mvebu.  Things have been
quiet, so let's get it in next for some more test coverage.

Jason, please consider *only* patch 1 for inclusion, as long as we
have Gregory's Ack on it. I don't want to break the irqchip driver
because of a clean-up! On the other side, if such weird handling
is needed, we need find why and document it.

No sweat.  I've now rolled irqchip/mvebu back to:

  aaae00a7fa86 irqchip: armada-370-xp: Simplify interrupt map, mask and unmask

and an updated for-next is being build-tested and pushed hopefully
before Stephen gets his cup of coffee.  :)

thx,

Jason.