Thread (10 messages) 10 messages, 3 authors, 2014-11-17

[PATCH v4 5/6] Documentation: dt-bindings: Add binding info for X-Gene QMTM UIO driver

From: anup@brainfault.org (Anup Patel)
Date: 2014-11-16 04:26:12
Also in: linux-devicetree, lkml

On Thu, Nov 13, 2014 at 1:15 PM, Ankit Jindal [off-list ref] wrote:
quoted hunk ↗ jump to hunk
This patch adds device tree binding documentation for
X-Gene QMTM UIO driver.

Signed-off-by: Ankit Jindal <redacted>
Signed-off-by: Tushar Jagad <redacted>
---
 .../devicetree/bindings/uio/uio_xgene_qmtm.txt     |   51 ++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt
diff --git a/Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt b/Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt
new file mode 100644
index 0000000..ed85bc6
--- /dev/null
+++ b/Documentation/devicetree/bindings/uio/uio_xgene_qmtm.txt
@@ -0,0 +1,51 @@
+APM X-Gene QMTM nodes
+
+The Applied Micro X-Gene SOC has on-chip QMTM (Queue manager
+and Traffic manager). It is a device for managing hardware queues.
+It also implements QoS among hardware queues hence term "traffic"
+manager is present in its name.
+
+Required properties:
+- compatible: Should be "apm,xgene-qmtm"
+- reg: Address and length of the register set for the device. It contains the
+  information of registers in the same order as described by reg-names.
+- reg-names: Should contain the register set names
+  - "csr": QMTM control and status register address space.
+  - "fabric": QMTM memory mapped access to queue states.
+- qpool-memory: Points to the phandle of the node defining memory location for
+        creating QMTM queues. This must point to the reserved-memory node
+        (as-per reserved memory bindings). It is expected that size and
+        location of qpool memory will be configurable via bootloader.
+- clocks: Reference to the clock entry.
+- num-queues: Number of queues under this QMTM device.
+- devid: QMTM identification number for the system having multiple QMTM devices.
+        This is used to form a unique id (a tuple of queue number and
+        device id) for the queues belonging to this device.
+
+Example:
+       qmtm1_uio_qpool: qmtm1_uio_qpool {
+               reg = <0x0 0x0 0x0 0x0>
+       };
+
+       qmtm1clk: qmtmclk at 1f20c000 {
+               compatible = "apm,xgene-device-clock";
+               clock-output-names = "qmtm1clk";
+               status = "ok";
+       };
+
+       qmtm1_uio: qmtm_uio at 1f200000 {
+               compatible = "apm,xgene-qmtm";
+               status = "disabled";
+               reg = <0x0 0x1f200000 0x0 0x10000>,
+                     <0x0 0x1b000000 0x0 0x400000>;
+               reg-names = "csr", "fabric";
+               qpool = <&qmtm1_uio_qpool>;
Small typo, this should be qpool-memory = <...>;
+               clocks = <&qmtm1clk 0>;
+               num-queues = <0x400>;
+               devid = <1>;
+       };
+
+       /* Board-specific peripheral configurations */
+       &qmtm1_uio {
+               status = "ok";
+       };
--
1.7.9.5

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