[Patch Part2 v4 21/31] PCI/MSI: enhance PCI MSI core to support hierarchy irqdomain
From: bhelgaas@google.com (Bjorn Helgaas)
Date: 2014-11-06 05:29:21
Also in:
linux-acpi, linux-pci, lkml
From: bhelgaas@google.com (Bjorn Helgaas)
Date: 2014-11-06 05:29:21
Also in:
linux-acpi, linux-pci, lkml
On Wed, Nov 5, 2014 at 9:58 PM, Jiang Liu [off-list ref] wrote:
On 2014/11/6 7:09, Bjorn Helgaas wrote:quoted
On Tue, Nov 04, 2014 at 08:01:55PM +0800, Jiang Liu wrote:
quoted
quoted
+{ + return (irq_hw_number_t)msidesc->msi_attrib.entry_nr | + PCI_DEVID(pdev->bus->number, pdev->devfn) << 11 | + (pci_domain_nr(pdev->bus) & 0xFFFFFFFF) << 27;Where does this bit layout come from? Is this defined in the spec somewhere? A reference would help.We need a unique number to identify every possible MSI source, and this ID number is only used within the irqdomain subsystem. So we used above algorithm to generate the ID number, there's no specification for it.
A comment to that effect would be great. Bjorn