Thread (43 messages) 43 messages, 5 authors, 2014-10-10
STALE4271d

[PATCH v2 1/8] ARM: add mach-asm9260

From: Russell King - ARM Linux <hidden>
Date: 2014-09-24 10:25:42

On Wed, Sep 24, 2014 at 11:56:03AM +0200, Oleksij Rempel wrote:
Am 24.09.2014 um 11:43 schrieb Russell King - ARM Linux:
quoted
The "why" is in the text from your oops dump.  That's precisely /why/ we
print that text - so that we know /why/ the fault happened.
Here is oops message:
http://pastebin.com/qYWeAyfV

i can avoid this oops by setting size at least 0x2000 per register
range. Do it mean my TLB supports only 8 KiB pages?
No, it has nothing to do with the TLB.

Unable to handle kernel paging request at virtual address c2802174
pgd = c0004000
[c2802174] *pgd=21805811, *pte=00000000, *ppte=00000000
Internal error: Oops: 7 [#1] PREEMPT ARM

The number after the Oops: is the FSR value, which means "page translation
fault", and sure enough, the pgd/pte values show that there is no page
table entry at the faulting address.

That's odd, because ioremap() aligns the size of the requested mapping up
to a multiple of the page size, and inserts page table entries according
to the rounded size.

Where are you calling ioremap(), iounmap() etc?  IOW, please show your
code for this.

I also notice that the unwinder failed to unwind the complete backtrace:

[<c02bcb38>] (clk_gate_is_enabled) from [<c02b9a0c>] (clk_disable_unused_subtree+)
[<c02b9a0c>] (clk_disable_unused_subtree) from [<c02b99c8>] (clk_disable_unused_s)

which is really annoying.  Maybe turning frame pointers on will get is a
proper backtrace, though I don't think it's that important to this bug.

-- 
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