Thread (23 messages) 23 messages, 5 authors, 2014-09-04

[PATCH v2 10/12] clk: sunxi: mod0: Introduce MMC proper phase handling

From: Maxime Ripard <hidden>
Date: 2014-09-02 07:52:34
Also in: linux-devicetree, linux-mmc

Hi,

On Mon, Sep 01, 2014 at 02:39:45PM -0700, Mike Turquette wrote:
Quoting Maxime Ripard (2014-08-30 13:03:09)
quoted
The MMC clock we thought we had until now are actually not one but three
different clocks.

The main one is unchanged, and will have three outputs:
  - The clock fed into the MMC
  - a sample and output clocks, to deal with when should we output/sample data
    to/from the MMC bus

The phase control we had are actually controlling the two latter clocks, but
the main MMC one is unchanged.

We can adjust the phase with a 3 bits value, from 0 to 7, 0 meaning a 180 phase
shift, and the other values being the number of periods from the MMC parent
clock to outphase the clock of.

Signed-off-by: Maxime Ripard <redacted>
Looks good. Thanks a lot for revisiting this after talking to your
hardware team!
It's not *our* hardware team, but I'll let them know :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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