On Fri, Sep 19, 2014 at 08:30:07PM +0200, Alexandre Belloni wrote:

On 19/09/2014 at 17:39:32 +0100, Russell King - ARM Linux wrote :

quoted

On Fri, Sep 19, 2014 at 11:50:01AM +0200, Alexandre Belloni wrote:

quoted

On 26/08/2014 at 16:17:57 +0200, Tomasz Figa wrote :

quoted

Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
settings configured in registers leading to crashes if L2C is enabled
without overriding them. This patch introduces bindings to enable
prefetch settings to be specified from DT and necessary support in the
driver.

Signed-off-by: Tomasz Figa <redacted>

Tested-by: Alexandre Belloni <redacted>

It is working and useful on Atmel's sama5d4 were the bootloader is not
configuring the L2C prefetch. However, I'm wondering whether we should
add support for setting L310_PREFETCH_CTRL_DATA_PREFETCH and
L310_PREFETCH_CTRL_INSTR_PREFETCH. I'm currently doing it by using
".l2c_aux_val    = L310_AUX_CTRL_DATA_PREFETCH |
L310_AUX_CTRL_INSTR_PREFETCH" (those are the same bits) but this has the
disadvantage of displaying the "L2C: platform modifies aux control
register:" twice.

The L2C documentation, freely available from the ARM infocentre website,
has the answer to this for you.

The two bits in the prefetch control register which control the data
and instruction prefetching are aliases of the aux control register.
If you set them to a value in one register, they are reflected in the
other.

The reason for that is that once the L2 cache is enabled, writes to
the aux control register are no longer permitted, but it's safe to
enable and disable the prefetching with the cache already enabled.
This reason is even stated in the documentation.

Yeah, so my question still holds, should we have an other way to
enable/disable I/D prefetch by adding two other DT bindings ?

Your question doesn't hold, because the above answers it conclusively.
No.

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