Thread (9 messages) 9 messages, 6 authors, 2014-09-01
STALE4303d

[PATCH v9 4/6] ARM: Exynos: switch to using generic cpufreq driver for Exynos4210/5250/5420

From: Thomas Abraham <hidden>
Date: 2014-08-29 12:52:16
Also in: linux-pm, linux-samsung-soc

Hi Kevin,

On Wed, Aug 27, 2014 at 3:55 AM, Kevin Hilman [off-list ref] wrote:
On Tue, Aug 26, 2014 at 8:15 AM, Kevin Hilman [off-list ref] wrote:
quoted
On Mon, Aug 25, 2014 at 10:25 PM, Chander Kashyap [off-list ref] wrote:
[...]
quoted
quoted
quoted
Can you clarify how you're setting the voltages to ensure stability?
below is the diff :  wip/exynos/integ
Thanks.

I've applied your patch, and bootup shows vdd_arm and vdd_kfc at
1500mV, but still when booting with cpuidle enabled (bL switcher
disabled), I'm seeing lockups with no kernel output.  With CPUidle
disabled, things are pretty stable.

What tree are you using to test this out on 5420?  I'm using mainline
v3.17-rc1 + DT patch for CPUidle and this cpufreq series.  See my
wip/exynos/integ branch at
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux.git.
I mis-stated this.  Actually my tree is based on the v3.17-rc1 branch
of the exynos-reference tree[1] + the above mentioned patches for
cpuidle and cpufreq.

Also, I've narrowed down the instability a bit, and it's not related
to CPUidle.  I can now trigger a boot hang even without CPUidle
enabled.  Here's a quick way to cause a boot lockup. With the switcher
disabled, I enable CPUfreq and set the default governor to
performance.  As soon as cpufreq driver loads, it tries to use the top
frequences for both clusters, and it hangs.

Selectively disabling frequencies, I narrowed it down to the 1.3GHz
and 1.2GHz frequencies of the little cluster.  With these commented
out in the DT, it will fully boot with the performance governor
enabled.

So that leads to the question.  Are all of the operating points in
exynos5420.dtsi valid for exynos5800, and have they been validated?
I tried to recreate the boot lockup issue using the same steps you
listed above for the Exynos5800 peach-pi platform (Chromebook2), but I
do not see any issues. I can see both clusters with max clock speed
after boot (1.8GHz and 1.3GHz).

I am using v3.17-rc2 + CPUFreq Patches + max77802 regulator support
patches for Chromebook2 + temp hack to set A15 voltage to 1.35V and A7
voltage to 1.3V.

Sorry for the delaying in following up.

Thanks,
Thomas.
Kevin

[1]https://github.com/exynos-reference/kernel.git
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