On 08/13/2014 09:56 PM, Jingoo Han wrote:

On Thursday, August 14, 2014 12:01 AM, Suravee Suthikulpanit wrote:

quoted

From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>

ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frame. This patch introduces support for
the non-secure GICv2m register frame. Currently, GICV2m is available
in certain version of GIC-400.

The patch introduces a new property in ARM gic binding, the v2m subnode.
It is optional.

Hi Suravee Suthikulpanit,

I added some minor comments.

Thanks for the cleaning up comments.

Suravee