Am Dienstag, 12. August 2014, 14:06:11 schrieb Doug Anderson:

Heiko,

On Wed, Aug 6, 2014 at 10:09 AM, Doug Anderson [off-list ref] 

wrote:

quoted

This adds support for the sdmmc and emmc ports on the rk3288 using the

currently posted driver from Addy at:
  https://patchwork.kernel.org/patch/4653631/

Note:
* This is not baesd on Jaehoon's patch series removing the slot node,

  but it does use new syntax like putting the bus width at the top
  level and using the new cap-mmc-highspeed / cap-sd-highspeed.  A
  future patch will modify this one to remove the slot node.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
Changes in v3: None
Changes in v2:
- New patchwork link for Addy's patch

 arch/arm/boot/dts/rk3288.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index e7cb008..dc98a5b 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi

@@ -78,6 +78,28 @@

                clock-frequency = <24000000>;
        
        };

+       sdmmc: dwmmc at ff0c0000 {
+               compatible = "rockchip,rk3288-dw-mshc";
+               clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x100>;
+               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0xff0c0000 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <0>;

When doing other testing I realized that I missed a:
  status = "disabled";

...from both of these two nodes.  I'm happy to repost with this fix or
I'm happy if you want to add to the patch when applying.

Let me know.  Thanks!

I don't really have a preference :-) . Btw. I also did plan on merging patches 
1 +4 and 2+3 now that the slot-removal series has landed.
Would this be ok with you?

So if you want to repost, you could do this as two patches already :-).


Heiko

quoted

+       };
+
+       emmc: dwmmc at ff0f0000 {
+               compatible = "rockchip,rk3288-dw-mshc";
+               clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x100>;
+               interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+               reg = <0xff0f0000 0x4000>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+

        i2c1: i2c at ff140000 {
        
                compatible = "rockchip,rk3288-i2c";
                reg = <0xff140000 0x1000>;

--
2.0.0.526.g5318336