[RFC 6/8] ARM: sunxi: Add PLL2 support
From: emilio@elopez.com.ar (Emilio López)
Date: 2014-07-28 03:49:44
Subsystem:
the rest · Maintainer:
Linus Torvalds
This commit adds the PLL2 definition to the sun4i, sun5i and sun7i device trees. PLL2 is used to clock audio devices. Not-signed-off-by: Emilio L?pez [off-list ref] --- Note that there is no handling of A10 rev A here, this should not go in as-is. arch/arm/boot/dts/sun4i-a10.dtsi | 8 ++++++++ arch/arm/boot/dts/sun5i-a10s.dtsi | 8 ++++++++ arch/arm/boot/dts/sun5i-a13.dtsi | 8 ++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++ 4 files changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index faf41e3..7671e56 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi@@ -81,6 +81,14 @@ clock-output-names = "pll1"; }; + pll2: clk at 01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-b-pll2-clk"; + reg = <0x01c20008 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll2", "pll2x2", "pll2x4", "pll2x8"; + }; + pll4: clk at 01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk";
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 92b5d1c..75e9632 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi@@ -74,6 +74,14 @@ clock-output-names = "pll1"; }; + pll2: clk at 01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-b-pll2-clk"; + reg = <0x01c20008 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll2", "pll2x2", "pll2x4", "pll2x8"; + }; + pll4: clk at 01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk";
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index d8f02ee..61c8331 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi@@ -75,6 +75,14 @@ clock-output-names = "pll1"; }; + pll2: clk at 01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-b-pll2-clk"; + reg = <0x01c20008 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll2", "pll2x2", "pll2x4", "pll2x8"; + }; + pll4: clk at 01c20018 { #clock-cells = <0>; compatible = "allwinner,sun4i-a10-pll1-clk";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index b1f3776..766ad81 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi@@ -91,6 +91,14 @@ clock-output-names = "pll1"; }; + pll2: clk at 01c20008 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-a10-b-pll2-clk"; + reg = <0x01c20008 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll2", "pll2x2", "pll2x4", "pll2x8"; + }; + pll4: clk at 01c20018 { #clock-cells = <0>; compatible = "allwinner,sun7i-a20-pll4-clk";
--
2.0.3